1. Field of the Invention
The present invention relates to a liquid crystal display (LCD) device and more particularly, to a copper alloy, an array substrate of a liquid crystal display using the copper alloy and a method of fabricating an array substrate having the copper alloy.
2. Discussion of the Related Art
Liquid crystal display (LCD) devices are commonly used for notebook computers and desktop monitors because of their superior resolution, color image display, and image display quality. Generally, liquid crystal display (LCD) devices include two substrates spaced apart and facing each other with a liquid crystal material layer interposed between the two substrates. Each of the first and second substrates include opposing electrodes, such that when a voltage is applied to each of the electrodes, an electric field is induced between the electrodes. Accordingly, an alignment of the liquid crystal molecules of the liquid crystal material layer is changed by the varying intensity or direction of the induced electric field. Thus, the LCD device displays an image by varying transmittance of light through the liquid crystal material layer according to the arrangement of the liquid crystal molecules.
An active matrix LCD device, which has pixels in a matrix type, has been commonly used because of its high resolution and fast response time. An array substrate of the active matrix LCD device includes a plurality of thin film transistors (TFTs) and a plurality of pixel electrodes, each connected with one of the TFTs.
FIG. 1 is a plan view of an array substrate for a liquid crystal display device according to the related art. In FIG. 1, a gate line 14 is formed along a horizontal direction, and a data line 20 is formed along a vertical direction perpendicular to the gate line 14. The gate and data lines 14 and 20 cross each other to define a pixel region P, wherein a thin film transistor T is electrically connected to the gate and data lines 14 and 20 to function as a switching device. A pixel electrode 30 is formed within the pixel region P, and the pixel electrode 30 is electrically connected to the thin film transistor T through a drain contact hole 28.
The thin film transistor T includes a gate electrode 12 that extends from the gate line 14, an active layer 18 that overlaps the gate electrode 12, a source electrode 22 that extends from the data line 20 and overlaps the active layer 18, and a drain electrode 24 that is spaced apart from the source electrode 22 and overlaps the active layer 18.
FIG. 2 is a cross sectional view along II—II of the array substrate of FIG. 1 according to the related art. In FIG. 2, a gate electrode 12 is formed on a transparent substrate 1, and a gate insulator 16 is formed on the gate electrode 12. An active layer 18 made of amorphous silicon is formed on the gate insulator 16 over the gate electrode 12. An ohmic contact layer 19 made of doped amorphous silicon is formed on the active layer 18. Source and drain electrodes 22 and 24 are formed on the ohmic contact layer 19 to be spaced apart from each other. A portion of the active layer 18 is exposed between the source and drain electrodes 22 and 24, thereby forming a channel ch of the thin film transistor T (in FIG. 1). A passivation layer 26 is formed on the source and drain electrodes 22 and 24, and includes a drain contact hole 28 to expose a portion of the drain electrode 24. A pixel electrode 30 is formed on the passivation layer 26 within the pixel region P, and is electrically connected to the drain electrode 24 through the drain contact hole 28.
Scanning signals or data signals from peripheral integrated circuits (not shown) are supplied to a liquid crystal panel, including the array substrate illustrated above, through the gate line 14 or the data line 20. Each thin film transistor T turns ON/OFF in a regular sequence according to the scanning signals transmitted through the gate line. When the thin film transistor T turns ON, the data signals transmitted through the data line 20 are supplied to the pixel electrode 30 via the thin film transistor T.
Presently, scanning time has decreased and transmission of scanning and data signals has increased due to large area and high resolution LCD devices. The gate and data lines 14 and 20 include materials having relatively low electrical resistivity, such as aluminum (Al) or an aluminum alloy, thereby preventing delay of the scanning and data signals. However, aluminum may be easily corroded by acid during fabrication processing. Thus, copper (Cu) has been used as a material for the gate and data lines since it has a lower electrical resistivity than aluminum. For example, copper commonly has an electrical resistivity of about 2.3 μΩ·cm, and has a strong chemical corrosion resistance.
FIG. 3 is a flow chart showing a manufacturing process of a copper line according to the related art. During a step ST 1, a copper layer is deposited onto a substrate by a depositing method, such as sputtering.
During a step ST 2, a photoresist resin is coated onto the copper layer. The photoresist resin is made of a photosensitive organic polymer or a mixture of a photosensitive material and a polymer. The photoresist resin is a negative type, wherein a portion that has not been exposed to light is removed. The photoresist resin may be a positive type, wherein a portion that has been exposed to light is removed.
During a step ST 3, the photoresist resin is exposed to light by using a mask, which includes blocking portions and openings. Then, the photoresist resin is developed, thereby forming a photoresist pattern.
During a step ST4, the copper layer is patterned using the photoresist pattern as a patterning mask. Thus, the copper layer that is not covered with the photoresist pattern is removed.
During a step ST 5, the photoresist pattern is stripped by dipping the substrate including the patterned copper layer into a stripper. Accordingly, formation of the copper line is completed. However, since pure copper has low chemical resistance to the stripper, a surface of the copper layer that contacts the stripper may be removed by the stripper, whereby a surface of the copper layer becomes uneven.
FIGS. 4A and 4B are scanning electron microscope (SEM) photographs showing a surface of a copper layer before and after stripping a photoresist pattern, respectively, according to the related art. In FIG. 4A, a surface of a copper layer deposited onto a substrate has a substantially uniform surface before stripping the photoresist pattern. In FIG. 4B, the surface of the copper layer after stripping the photoresist pattern has a non-uniform surface that includes many cracks. The cracks lower electrical characteristics of the copper line, and cause formation of poor patterns on the copper line. Accordingly, copper alloys have been proposed.
FIG. 5 is a graph showing content of an added metal versus electrical resistivity of various copper alloys according to the related art. In FIG. 5, the electrical resistivity of the copper alloys is proportional to an added metal content, wherein the added metal includes one of nickel (Ni), aluminum (Al), tantalum (Ta), and tin (Sn). As the added metal content is decreased to less than 1 wt. %, the electrical resistivity of the copper alloys is over 4 μΩ·cm, which is larger than the electrical resistivity of pure copper. The alloy of copper and nickel has a relatively low electrical resistivity as compared to other alloys, but has a relatively weak resistance to the stripper when the photoresist pattern is removed.